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integrated prozessorschaltung with several processors which have local memory and resources by dma accesses to this memory to synchronize

机译:集成有几个处理器的prozessorschaltung,这些处理器通过DMA访问具有本地内存和资源的该内存以进行同步

摘要

A processor integrated circuit according to the present invention comprises low-speed and high-speed computing units (110),(120) as two or more kinds of computing units, a program memory (131) as a first storage unit in which programs for operation the computing units are stored, a data memory (second storage unit) (132) as a memory area to be used for computation by the computing units, and selectors (141),(142) as first and second connection switching units for connecting a computing unit that performs computation to the first and second storage units, wherein the program memory (131) and the data memory (132) are connected to the low-speed computing unit (110) or the high-speed computing unit (120). In this construction, it is possible to achieve both of securing in program compatibility and speeding-up without increasing the circuit scale and power consumption of the processor integrated circuit.
机译:根据本发明的处理器集成电路包括作为两种或更多种计算单元的低速和高速计算单元(110),(120),作为用于其中存储有程序的第一存储单元的程序存储器(131)。存储计算单元的操作,作为要由计算单元进行计算的存储区域的数据存储器(第二存储单元)(132)以及作为用于连接的第一和第二连接切换单元的选择器(141),(142)对第一和​​第二存储单元执行计算的计算单元,其中程序存储器(131)和数据存储器(132)连接到低速计算单元(110)或高速计算单元(120) 。在这种结构中,可以在不增加电路规模和处理器集成电路的功耗的情况下实现程序兼容性和加速的保证。

著录项

  • 公开/公告号DE602004029729D1

    专利类型

  • 公开/公告日2010-12-02

    原文格式PDF

  • 申请/专利权人 PANASONIC CORP.;

    申请/专利号DE20046029729T

  • 申请日2004-08-06

  • 分类号G06F15/78;G06F9/06;G06F9/30;G06F9/38;G06F12;G06F13/16;G06F13/28;G06F15/17;G06F17/50;

  • 国家 DE

  • 入库时间 2022-08-21 17:46:39

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