Dual stress (duplex stress) being production manner of the SOI substrate and the manner which

摘要

Topic This invention in the nFET territory of structure, tensile stress is applied, the double stress Si structure which applies compressed stress on the pFET territory of structure is offered.SolutionsSpeaking roughly, double stress Si structure, on the baseplate and the baseplate has 1st semiconductor layer with respect to compressibility dielectric layer and compressibility dielectric layer, at 1st lamination stack on baseplate, compressibility dielectric layer in 1st semiconductor layer, tensile stress is transmitted, in regard to the aforementioned 1st lamination stack and the baseplate it pulls and possesses 2nd semiconductor layer with respect to characteristic dielectric layer and pulling characteristic dielectric layer, it pulls at 2nd lamination stack on baseplate, and characteristic dielectric layer transmits compressed stress to 2nd semiconductor layer, the aforementioned 2nd laminationIt possesses with stack. As for pulling characteristic dielectric layer and compressibility dielectric layer it is desirable to possess the nitride of Si₃ N₄ and the like. Selective figure Figure 1