首页> 外国专利> STRUCTURE AND FABRICATION METHOD OF TUNNEL FIELD EFFECT TRANSISTOR WITH INCREASED DRIVE CURRENT AND REDUCED GATE INDUCED DRAIN LEAKAGE (GIDL)

STRUCTURE AND FABRICATION METHOD OF TUNNEL FIELD EFFECT TRANSISTOR WITH INCREASED DRIVE CURRENT AND REDUCED GATE INDUCED DRAIN LEAKAGE (GIDL)

机译:增大驱动电流和减少闸门引起的漏水(GIDL)的隧道场效应晶体管的结构和制造方法

摘要

Gate induced drain leakage in a tunnel field effect transistor is reduced while drive current is increased by orienting adjacent semiconductor bodies, based on their respective crystal orientations or axes, to optimize band-to-band tunneling at junctions. Maximizing band-to-band tunneling at a source-channel junction increases drive current, while minimizing band-to-band tunneling at a channel-drain junction decreases GIDL. GIDL can be reduced by an order of magnitude in an embodiment. Power consumption for a given frequency can also be reduced by an order of magnitude.
机译:通过根据相邻的半导体本体各自的晶体取向或轴来定向相邻的半导体本体,以优化结处的带间隧穿,从而减少了隧道场效应晶体管中栅极引起的漏极泄漏,同时增加了驱动电流。在源-沟道结处使带间隧穿最大化可增加驱动电流,而在沟道-漏结处使带间隧穿最小化则可降低GIDL。在一个实施例中,GIDL可以减少一个数量级。给定频率的功耗也可以降低一个数量级。

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