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Two-Step Subranging ADC Architecture

机译:两步转换ADC架构

摘要

First and second track and hold stages track and store an input voltage for a sample of an analog input signal. A coarse reference ladder provides a plurality of coarse references. The coarse reference ladder includes a first coarse reference and a second coarse reference ladder. A coarse ADC performs a first comparison of the input voltage and the coarse references and outputs a coarse output based on the first comparison. A switch matrix includes switches and is configured to close a switch corresponding to a coarse reference based on the coarse output. A fine reference ladder provides fine references. A fine ADC performs a second comparison of the input voltage and the fine references and outputs a fine output based on the second comparison. Logic outputs a digital output for the sample of the analog input signal based on the coarse output and the fine output.
机译:第一和第二跟踪和保持级跟踪并存储用于模拟输入信号样本的输入电压。粗略参考阶梯提供了多个粗略参考。粗略参考阶梯包括第一粗略参考阶梯和第二粗略参考阶梯。粗略ADC对输入电压和粗略基准进行第一比较,并根据第一比较输出粗略输出。开关矩阵包括开关,并且被配置为基于粗略输出来闭合与粗略参考相对应的开关。精细参考阶梯提供了精细参考。精细ADC对输入电压和精细基准进行第二次比较,并基于第二次比较输出精细输出。逻辑根据粗略输出和精细输出,为模拟输入信号的样本输出数字输出。

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