OPTIMIZATION-BASED SIMULATED ANNEALING FOR INTEGRATED CIRCUIT PLACEMENT

摘要

Generating of the initial temperature value for a simulated annealing process in the placement of circuit components in the physical design of integrated circuit (IC) is based on previous partitioning, if any, of the IC components into bins. An iteration limit value is then assigned equal to the initial temperature value. The simulated annealing process is then performed on a current partitioning of the IC components into bins according to the iteration limit value. The IC components are partitioned further into an exponentially larger total number of smaller bins compared to a previous number of bins. The process is then repeated starting with the operation of generating an initial temperature value for the simulated annealing process until the number of circuit components in each bin is below a specified number.