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Chip-Planning, Placement and Global Routing of Macro/Custom Cell Integrated Circuits Using Simulated Annealing

机译：使用模拟退火的宏/定制单元集成电路的芯片规划，布局和全局布线

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作者
Carl Sechen;
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年度 1988
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原文格式 PDF
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入库时间 2022-08-20 21:00:29

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1. OPTIMIZATION OF INTEGRATED CIRCUITS PLACEMENT FOR ELECTRIC FIELD REDUCTION INSIDE TELECOMMUNICATIONS EQUIPMENT USING MONTE CARLO SIMULATION AND PARALLEL RECOMBINATIVE SIMULATED ANNEALING [J] . Sotirios K. Goudos, Zaharias D. Zaharis, Pavlos I. Lazaridis, Microwave and optical technology letters . 2007,第12期

机译：蒙特卡罗模拟和并行组合模拟退火优化电信设备内部电场的综合电路布置
2. Macro-cell placement for analog physical designs using a hybrid genetic algorithm with simulated annealing [J] . Lihong Zhang, Rabin Raut, Yingtao Jiang, Integrated Computer-Aided Engineering . 2005,第4期

机译：使用混合遗传算法和模拟退火的模拟物理设计宏单元放置
3. Study on the accuracy of an approximate cell position by global placement using simulated annealing [J] . Tomoki Nakaya, Toshiro Akino, Masahiko Toyonaga 電子情報通信学会技術研究報告. 信号処理. Signal Processing . 2003,第146期

机译：使用模拟退火通过整体放置研究近似电池位置的精度
4. Chip-planning, placement, and global routing of macro/custom cellintegrated circuits using simulated annealing [C] . Sechen C. NAECON 1992;IEEE national aerospace and electronics conference . 1992

机译：使用模拟退火的宏/定制单元集成电路的芯片规划，布局和全局布线
5. Automated placement and routing of cell matrix circuits. [D] . Yatsenko, Dimitri V. 2003

机译：单元矩阵电路的自动放置和布线。
6. Creating Custom Neural Circuits on Multiple Electrode Arrays Utilizing Optical Tweezers for Precise Nerve Cell Placement [O] . Frank H. Kung, Ellen Townes-Anderson 2020

机译：利用光学镊子在多电极阵列上创建定制神经电路以获得精确的神经电池放置
7. Design partitioning and layer assignment for 3D integrated circuits using tabu search and simulated annealing [O] . Sadiq M. Sait, Feras Chikh Oughali, Mohammed Al-Asli 2016

机译：使用禁忌搜索和模拟退火为3D集成电路设计分区和层分配
8. Improved Simulated Annealing Algorithm for Standard Cell Placement [R] . Jones, M., Banerjee, P. 1988

机译：改进的模拟退火算法用于标准单元放置

Chip-Planning, Placement and Global Routing of Macro/Custom Cell Integrated Circuits Using Simulated Annealing

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