Automatic circuit design technique using pareto optimal solutions

摘要

A set of pareto optimal solutions that are non-dominated solutions in a solution specification space for respective items in requirement specification is extracted with a combination of a circuit configuration including a specific function and a process constraint condition. Furthermore, pareto optimal solutions are extracted for all combinations of the circuit configuration and the process constraint condition, and pareto optimal solutions are extracted for the respective process constraint conditions. When such extracted data is distributed to designers, it is possible to reduce time to generate the pareto optimal solutions, and the designers can design the optimum circuit having a desired function by using such extracted data.