METHOD OF COMPENSATING CLOCK SKEW, CLOCK SKEW COMPENSATING CIRCUIT FOR REALIZING THE METHOD, AND INPUT/OUTPUT SYSTEM INCLUDING THE CLOCK SKEW COMPENSATING CIRCUIT

摘要

A method of compensating clock skew may include generating (2M+1) detected values by applying (2M+1) delay clock signals to (2M+1) pieces of delay data, wherein M is a natural number, determining a dominant logic value based on a comparison of a number of logic high detected values and a number of logic low detected values from among the (2M+1) detected values, determining a median delay time based on a number of the (2M+1) detected values having the dominant logic value, and adjusting a phase of a clock signal using the median delay time.