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Interleaving scheme for an LDPC coded 32 APSK system
Interleaving scheme for an LDPC coded 32 APSK system
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机译:LDPC编码32 APSK系统的交织方案
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摘要
An approach is provided for interleaving low density parity check (LDPC) encoded bits in 32APSK modulation systems. By assigning the bits determining modulation symbols based on different bit degrees, one can efficiently find the desirable tradeoff between error performance and error floor provided by the LDPC codes in use.
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