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Method of fabricating transistors and a transistor structure for improving short channel effect and drain induced barrier lowering

机译:制造晶体管的方法和晶体管结构,用于改善短沟道效应和漏极引起的势垒降低

摘要

A method of fabricating transistors includes: providing a substrate including an N-type well and P-type well; forming a first gate on the N-type well and a second gate on the P-type well, respectively; forming a third spacer on the first gate; forming an epitaxial layer in the substrate at two sides of the first gate; forming a fourth spacer on the second gate; forming a silicon cap layer covering the surface of the epitaxial layer and the surface of the substrate at two sides of the fourth spacer; and forming a first source/drain doping region and a second source/drain doping region at two sides of the first gate and the second gate respectively.
机译:一种晶体管的制造方法,包括:提供包括N型阱和P型阱的基板;在N型阱上分别形成第一栅极和在P型阱上形成第二栅极;在第一栅极上形成第三隔离物;在所述第一栅极的两侧在所述衬底中形成外延层;在第二栅极上形成第四隔离物;在所述第四隔离物的两侧形成覆盖所述外延层的表面和所述基板的表面的硅覆盖层。在所述第一栅极和第二栅极的两侧分别形成第一源极/漏极掺杂区和第二源极/漏极掺杂区。

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