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Redundant micro-loop structure for use in an integrated circuit physical design process and method of forming the same

机译:用于集成电路物理设计过程的冗余微环结构及其形成方法

摘要

An integrated circuit including a first wire of a first level of wiring tracks, a second wire of a second level of wiring tracks, a third wire of a third level of wiring tracks, and a fourth wire located at a first distance from the second wire in the second level of wiring tracks. A first via connects the first and second wires at a first location of the second wire. A second via connects the second and third wires at the first location, the second via is approximately axially aligned with the first via. A third via connecting the third and fourth wires at a second location of the fourth wire. A fourth via connecting the first and fourth wires at the second location, the fourth via is approximately axially aligned with the third via. The second, third, and fourth vias, and the third and fourth wires form a path between the first and second wires redundant to the first via.
机译:一种集成电路,包括第一层布线轨线的第一线,第二层布线轨线的第二线,第三层布线轨线的第三线和与第二层线相距第一距离的第四层线在第二层布线轨道中。第一通路在第二导线的第一位置处连接第一导线和第二导线。第二通孔在第一位置连接第二和第三导线,第二通孔与第一通孔大致轴向对准。第三通路在第三导线的第二位置处连接第三导线和第四导线。第四通路在第二位置处连接第一和第四导线,第四通路与第三通路大致轴向对准。第二,第三和第四通孔以及第三和第四导线在第一和第二导线之间形成对第一通孔冗余的路径。

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