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Constraint Programming Based Method for Bus-Aware Macro-Block Pin Placement in a Hierarchical Integrated Circuit Layout
Constraint Programming Based Method for Bus-Aware Macro-Block Pin Placement in a Hierarchical Integrated Circuit Layout
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机译:分层集成电路布局中总线感知宏块引脚放置的基于约束编程的方法
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摘要
Assigning pins to macro-blocks of an Integrated Circuit (IC) chip is described. The macro-block pin assignments are automatically placed using Constraint Programming (CP) techniques to position the pins on the periphery of a macro-block. Bus-ordering and pin-spacing constraints are performed considering all the nets forming the IC design simultaneously. The CP formulation includes modeling detailed and discrete constraints required to achieve an optimal pin-assignment. A stochastic CSP solver is used to define the cost function on search points giving full assignments to all the variables. The macro-block pins are ultimately moved to computed locations.
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