FUNCTIONAL STRUCTURE OF A TRANSFORMER OF PRELIMINARY FA f Σ n i amp;m i (2 n ) OF PARALLEL-SERIAL MULTIPLICATOR f Σ (Σ) CONDITIONALLY, OF 'i' DIGIT TO SUM UP OF POSITIONAL ADDITIVE OF SUMS n i f(2 n ) AND m i f(2 n ) OF PARTIAL PRODUCTS USING ARITHMETICAL AXIOMS OF TERNARY NOTATION f(+1, 0, -1) WITH THE FORMATION OF A RESULTING SUM S Σ f(2 n ) IN A POSITIONAL FORMAT

摘要

FIELD: computational engineering.; SUBSTANCE: construction arithmetic of devices and introduction of different arithmetic procedures on arguments with positional symbolic structure of analog signals arguments [n_i]f(2ⁿ) and [m_i]f(2ⁿ) using arithmetical axioms of ternary notation f(+1, 0, -1).; EFFECT: increased the summing-up speed as the variants of the structure are realized using logical elements NOT, AND, OR, AND -NOT, OR-NOT.;1 dwg