Methods of preparation and the semiconductor component with deformation technology in three-dimensional transistors on the basis of global deformed half conductor base layers

摘要

A method with:Providing a semiconductor layer, which is formed by means of a substrate, wherein the semiconductor layer has a biaxial deformation;Forming a half conductor dough from the semiconductor layer, wherein the semiconductor chip a length and a width, wherein the length and width a in the uniaxial deformation which, along a length of the half conductor web is oriented;Forming a gate electrodes structure on to a central region of the half conductor web, wherein the gate electrodes structure is formed, a channel region in the semiconductor chip; andForm - of drain and source regions in the semiconductor chip adjacent to the channel region.