首页> 外国专利> Method for processing errors in e.g. electrically EPROM, of non-volatile memory device, involves reading non-erroneous bits of word during ulterior addressing of memory by reading relocated bit

Method for processing errors in e.g. electrically EPROM, of non-volatile memory device, involves reading non-erroneous bits of word during ulterior addressing of memory by reading relocated bit

机译:处理例如非易失性存储设备的电EPROM涉及在对存储器进行别处寻址期间通过读取重定位的位来读取字的非错误位

摘要

The method involves reading a word in a non-volatile memory during addressing of the memory, and detecting presence of a bit of the word in the memory by an error correction code. A part of another word is written in the memory with an address. The information with the address and a relocated bit is written in an auxiliary memory unit, where the relocated bit is located in an auxiliary memory location of the unit and includes a required logic value. Non-erroneous bits of another word are read during the ulterior addressing of the memory (50) by reading the relocated bit (52). An independent claim is also included for a non-volatile memory device comprising a non-volatile memory.
机译:该方法包括在存储器寻址期间读取非易失性存储器中的字,并通过纠错码检测该字在存储器中的存在。另一个单词的一部分与地址一起写入存储器。具有地址和重定位位的信息被写入辅助存储单元,其中重定位位位于该单元的辅助存储单元中,并且包括所需的逻辑值。通过读取重定位的位(52),在对存储器(50)进行最后寻址期间读取另一个字的非错误位。对于包括非易失性存储器的非易失性存储设备也包括独立权利要求。

著录项

  • 公开/公告号FR2964483A1

    专利类型

  • 公开/公告日2012-03-09

    原文格式PDF

  • 申请/专利权人 STMICROELECTRONICS (ROUSSET) SAS;

    申请/专利号FR20100057051

  • 发明设计人 TAILLIET FRANCOIS;

    申请日2010-09-06

  • 分类号G06F11/16;G11B20/18;G11C8/06;G11C29/04;

  • 国家 FR

  • 入库时间 2022-08-21 17:04:11

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