首页> 外国专利> METHOD OF UTILIZING DUAL COMPARATORS TO FACILITATE PRECISION SIGNAL RECTIFICATION AND TIMING SYSTEM WITHOUT SIGNAL FEEDBACK

METHOD OF UTILIZING DUAL COMPARATORS TO FACILITATE PRECISION SIGNAL RECTIFICATION AND TIMING SYSTEM WITHOUT SIGNAL FEEDBACK

机译:利用双比较器促进无信号反馈的精密信号整定和时序系统的方法

摘要

PROBLEM TO BE SOLVED: To provide a method and an associated apparatus for a signal rectification and timing circuit.;SOLUTION: A variable amplitude input signal 12 is generated. An upper threshold level is determined and a lower threshold level is determined. The variable amplitude input signal and the upper threshold level are input into a first comparator 22. The variable amplitude input signal and the lower threshold level are input into a second comparator 42. A first digital output signal 23 is generated in the first comparator using a hysteresis circuit and a second digital output signal 43 is generated in the second comparator using a hysteresis circuit. The first digital output signal and the second digital output signal are input into a logic array 64. A digital level pulse output signal 70 that has a digital transition where the variable amplitude input signal passed through a threshold level is generated in the logic array.;COPYRIGHT: (C)2013,JPO&INPIT
机译:解决的问题:提供一种用于信号整流和定时电路的方法和相关设备。解决方案:产生可变幅度的输入信号12。确定上阈值水平,并确定下阈值水平。可变幅度输入信号和上限阈值被输入到第一比较器22。可变幅度输入信号和下限阈值被输入到第二比较器42。第一数字输出信号23在第一比较器中使用迟滞电路,并且使用迟滞电路在第二比较器中生成第二数字输出信号43。第一数字输出信号和第二数字输出信号被输入到逻辑阵列64。数字电平脉冲输出信号70具有数字转换,其中在逻辑阵列中产生通过阈值电平的可变幅度输入信号。版权:(C)2013,JPO&INPIT

著录项

  • 公开/公告号JP2013034188A

    专利类型

  • 公开/公告日2013-02-14

    原文格式PDF

  • 申请/专利权人 GENERAL ELECTRIC CO GE;

    申请/专利号JP20120143961

  • 发明设计人 STEVEN THOMAS CLEMENS;

    申请日2012-06-27

  • 分类号H03M1/50;

  • 国家 JP

  • 入库时间 2022-08-21 17:00:03

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