首页> 外国专利> DRAM ADDRESS MAPPING CIRCUIT WITH DMAC FOR MULTI-CPU CORE PROCESSOR

DRAM ADDRESS MAPPING CIRCUIT WITH DMAC FOR MULTI-CPU CORE PROCESSOR

机译:具有用于多CPU内核处理器的DMAC的DRAM地址映射电路

摘要

PROBLEM TO BE SOLVED: To solve the problem that when a CPU core or an OS is 32 bit in a CPU system (PC, Tablet PC, PDA or the like), a main storage size is limited to about 3.5 GB which is equal to or less than 4 GB, and a memory loaded with a size of more than 4 GB (3.5 GB) becomes useless in a present state, and that since a current RAMDISK which is effective for execution speed improvement uses the main storage, the limitation of the main storage size is a hindrance to performance improvement in a 32 bit system.;SOLUTION: A circuit for mapping a local address of a DRAM to a system physical address includes a DMA function so that it is possible to economically use a DRAM area which has not been allocated to a main storage as a RAMDISK, and data transfer relating to this is locally performed on a local bus of the DRAM so that it is possible to supply the RAMDISK which is more excellent in execution efficiency than the RAMDISK using a conventional main storage.;COPYRIGHT: (C)2013,JPO&INPIT
机译:解决的问题:为了解决以下问题:当CPU内核或OS在CPU系统(PC,Tablet PC,PDA等)中为32位时,主存储大小被限制为大约3.5 GB,这等于小于4 GB的内存,并且装载了大于4 GB(3.5 GB)的内存在当前状态下变得无用,并且由于当前有效提高执行速度的RAMDISK使用了主存储,因此主存储器的大小阻碍了32位系统中性能的提高。解决方案:用于将DRAM的本地地址映射到系统物理地址的电路具有DMA功能,因此可以经济地使用以下DRAM区域:尚未将其分配给主存储作为RAMDISK,并且与此相关的数据传输在DRAM的本地总线上本地执行,因此可以提供执行效率比使用传统RAMDISK更好的RAMDISK主存储;版权:(C)2013,JPO&I NPIT

著录项

  • 公开/公告号JP2013073554A

    专利类型

  • 公开/公告日2013-04-22

    原文格式PDF

  • 申请/专利权人 KAIZUKA MASAO;

    申请/专利号JP20110213923

  • 发明设计人 KAIZUKA MASAO;

    申请日2011-09-29

  • 分类号G06F12/02;G06F3/08;G06F13/28;G06F12/06;

  • 国家 JP

  • 入库时间 2022-08-21 16:59:26

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号