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The simulated system and the transmission side mimicking device and the simulated program which use logical clock

机译:使用逻辑时钟的模拟系统,传输侧模拟装置和模拟程序

摘要

PPROBLEM TO BE SOLVED: To raise simulation speed in a distributed simulation system for simulating a mobile body based on logical time by reducing the advancing frequency of the logical time. PSOLUTION: The simulation system performs, when movement information of the mobile body is exchanged between logical processors, extrapolation processing with the same algorithm in both the logical processors on the transmitting side and receiving side of the movement information. The transmitting-side logical processor determines whether movement information by simulation processing of the mobile body (simulation movement information) is matched to movement information by extrapolation processing (extrapolation movement information) even at a future time, in addition to transmission of the simulation movement information to the receiving-side processor only when it is differed from the extrapolation movement information, and takes, when both are matched, the time up to the future time as a request time of the following time to a distributed simulation board. Accordingly, the advancing frequency of the logical time can be reduced in addition to reduction in the transmitting frequency of movement information, and high-speed simulation can be performed. PCOPYRIGHT: (C)2010,JPO&INPIT
机译:

要解决的问题:通过降低逻辑时间的提前频率,提高分布式仿真系统中的仿真速度,该分布式仿真系统用于基于逻辑时间模拟移动物体。

解决方案:当在逻辑处理器之间交换移动体的运动信息时,仿真系统执行运动信息的发送侧和接收侧的逻辑处理器中使用相同算法的外推处理。发送侧逻辑处理器除了发送模拟运动信息之外,甚至在将来的时间,还确定通过移动体的模拟处理的运动信息(模拟运动信息)是否与通过外推处理的运动信息(外推运动信息)相匹配。仅当它与外推运动信息不同时,才将其发送给接收方处理器,并且当两者都匹配时,将直到将来时间的时间作为下一时间的请求时间到分布式仿真板。因此,除了减少运动信息的发送频率之外,还可以减少逻辑时间的提前频率,并且可以执行高速仿真。

版权:(C)2010,日本特许厅&INPIT

著录项

  • 公开/公告号JP5274129B2

    专利类型

  • 公开/公告日2013-08-28

    原文格式PDF

  • 申请/专利权人 三菱電機株式会社;

    申请/专利号JP20080182752

  • 发明设计人 渡部 修介;

    申请日2008-07-14

  • 分类号G06F19;G09B9;

  • 国家 JP

  • 入库时间 2022-08-21 16:56:26

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