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Vertical Stacking of Carbon Nanotube Arrays for Current Enhancement and Control
Vertical Stacking of Carbon Nanotube Arrays for Current Enhancement and Control
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机译:碳纳米管阵列的垂直堆叠用于电流增强和控制
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摘要
Transistor devices having vertically stacked carbon nanotube channels and techniques for the fabrication thereof are provided. In one aspect, a transistor device is provided. The transistor device includes a substrate; a bottom gate embedded in the substrate with a top surface of the bottom gate being substantially coplanar with a surface of the substrate; a stack of device layers on the substrate over the bottom gate, wherein each of the device layers in the stack includes a first dielectric, a carbon nanotube channel on the first dielectric, a second dielectric on the carbon nanotube channel and a top gate on the second dielectric; and source and drain contacts that interconnect the carbon nanotube channels in parallel. A method of fabricating a transistor device is also provided.
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