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Microprocessor System Having Fault-Tolerant Architecture

机译:具有容错架构的微处理器系统

摘要

The invention relates to a microprocessor system for executing software modules, at least some of which are security critical, within the scope of controlling functions or tasks assigned to the software modules, comprising an intrinsically safe microprocessor module having at least two microprocessor cores. At least one further intrinsically safe microprocessor module having at least two microprocessor cores is provided. At least two microprocessor modules are connected via a bus system, at least two software modules are provided which execute functions, at least some of which overlap, the software modules having at least partially overlapping functions are distributed on a microprocessor module or n at least two microprocessor modules, and means for comparing or arbitrating events generated with the software modules for the identical functions are provided in order to detect software or hardware faults.
机译:本发明涉及一种用于执行软件模块的微处理器系统,该软件模块在控制分配给软件模块的功能或任务的范围内至少是一些对安全性至关重要的,包括具有至少两个微处理器核心的本质安全的微处理器模块。提供了至少一个具有至少两个微处理器核心的本质安全微处理器模块。经由总线系统连接至少两个微处理器模块,提供至少两个执行功能的软件模块,其中至少一些功能重叠,具有至少部分重叠功能的软件模块分布在微处理器模块上,或者至少两个为了检测软件或硬件故障,提供了微处理器模块以及用于比较或仲裁由软件模块产生的事件以实现相同功能的装置。

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