MICROPROCESSOR SYSTEM HAVING FAULT-TOLERANT ARCHITECTURE

摘要

The invention relates to a microprocessor system (MCUSA) for executing software modules, at least some of which are security-critical, within the scope of controlling functions or tasks assigned to the software modules, comprising an intrinsically safe microprocessor module (HWSA_i) having at least two microprocessor cores (CPU_i). According to the invention, at least one further intrinsically safe microprocessor module (HWSA_i i=1,... n) having at least two microprocessor cores (CPU₁, CPU₂; CPU₃, CPU₄) is provided, wherein the at least two microprocessor modules (HWSA₁, HWSA₂) are connected via a bus system (B), at least two software modules are provided which execute functions, at least some of which overlap, said software modules having at least partially overlapping functions are distributed on a microprocessor module (HWSA₁, HWSA₂) or on at least two microprocessor modules (HWSA₁, HWSA₂), and means for comparing and/or arbitrating events generated with the software modules for the identical functions are provided in order to detect software and/or hardware faults.