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INTEGRATED CIRCUIT HAVING A HARD CORE AND A SOFT CORE

机译:集成电路具有硬核和软核

摘要

An integrated circuit (IC) is disclosed. The integrated circuit includes a non-reconfigurable multi-threaded processor core that implements a pipeline having n ordered stages, wherein n is an integer greater than 1. The multi-threaded processor core implements a default instruction set. The integrated circuit also includes reconfigurable hardware that implements n discrete pipeline stages of a reconfigurable execution unit. The n discrete pipeline stages of the reconfigurable execution unit are pipeline stages of the pipeline that is implemented by the multi-threaded processor core.
机译:公开了一种集成电路(IC)。该集成电路包括实现具有n个有序级的流水线的不可重配置的多线程处理器内核,其中n是大于1的整数。该多线程处理器内核实现默认指令集。集成电路还包括可重构硬件,其实现可重构执行单元的n个离散管线级。可重配置执行单元的n个离散管线级是由多线程处理器核实现的管线的管线级。

著录项

  • 公开/公告号US2013054939A1

    专利类型

  • 公开/公告日2013-02-28

    原文格式PDF

  • 申请/专利权人 ANDREW C. FELCH;

    申请/专利号US201213594181

  • 发明设计人 ANDREW C. FELCH;

    申请日2012-08-24

  • 分类号G06F15/76;

  • 国家 US

  • 入库时间 2022-08-21 16:47:25

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