SYSTEM AND METHOD FOR INCREASING DDR MEMORY BANDWIDTH IN DDR SDRAM MODULES

摘要

A system and method for increasing DDR memory bandwidth in DDR SDRAM modules are provided. DDR memory has an inherent feature called the Variable Early Read command, where the read command is issued on CAS latency before the completion of the ongoing data burst and the effect of the CAS latency is minimized in terms of the effect on bandwidth. The system and method optimizes the remaining two access latencies (t_RP and t_RCD) for optimal bandwidth.