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Low noise, high CMRR and PSRR input buffer

机译:低噪声,高CMRR和PSRR输入缓冲器

摘要

A rail-to-rail buffer receiving a differential input signal and generating a differential output signal includes first and second amplifier circuits configured in a pseudo differential buffer structure and first and second comparators coupled to compare the respective part of the differential input signal and a first voltage and to generate select signals. Each of the first and second amplifier circuits includes first and second complementary differential input stages and the first and second comparators generate respective select signals to turn on only one of the first or the second differential input stage in each amplifier circuit depending on a value of the respective part of the differential input signal. In operation, the first and second complementary differential input stages of each amplifier circuit not being turned on at the same time.
机译:接收差分输入信号并产生差分输出信号的轨到轨缓冲器包括配置为伪差分缓冲器结构的第一和第二放大器电路,以及耦合以比较差分输入信号和第一部分的第一和第二比较器。电压并产生选择信号。第一和第二放大器电路中的每一个都包括第一和第二互补差分输入级,并且第一和第二比较器生成相应的选择信号,以根据每个放大器电路中的值仅导通每个放大器电路中的第一或第二差分输入级中的一个。差分输入信号的各个部分。在操作中,每个放大器电路的第一和第二互补差分输入级不会同时打开。

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