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Synchronous rectifier gate drive timing to compensate for transformer leakage inductance
Synchronous rectifier gate drive timing to compensate for transformer leakage inductance
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机译:同步整流器栅极驱动时序,以补偿变压器漏感
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摘要
An apparatus for providing synchronous rectifier gate drive timing is described. The apparatus includes circuitry to receive a first signal. The apparatus also includes circuitry to generate a second signal by modifying the first signal to delay a transition from high to low for a non-zero overlap duration. An output to apply an inverse of the first signal as a gate drive timing of at least a first transistor and to apply the second signal as a gate drive timing of at least a second transistor, where the first transistor is a part of a primary side of a full-bridge synchronous rectifier and the second transistor is a part of a secondary side of the full-bridge synchronous rectifier is also included. The second signal and the inverse of the first signal are high during the overlap duration. Methods and program storage devices are also disclosed.
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