首页> 外国专利> Integrated circuit comprising a non-dedicated terminal for receiving an erase program high voltage

Integrated circuit comprising a non-dedicated terminal for receiving an erase program high voltage

机译:包括用于接收擦除程序高压的非专用端子的集成电路

摘要

The disclosure relates to an integrated circuit electrically powered by a supply voltage and comprising a memory electrically erasable and/or programmable by means of a second voltage greater than the supply voltage. The integrated circuit comprises means for receiving the second voltage by the intermediary of a reception terminal of the supply voltage or by the intermediary of a reception or emission terminal of a data or clock signal. Applicable in particular to electronic tags comprising a reduced number of interconnection terminals.
机译:本公开涉及一种集成电路,该集成电路由供电电压供电,并且包括借助于大于供电电压的第二电压可电擦除和/或编程的存储器。集成电路包括用于通过供电电压的接收端子或数据或时钟信号的接收或发射端子的中间来接收第二电压的装置。特别适用于包括数量减少的互连端子的电子标签。

著录项

  • 公开/公告号US8351260B2

    专利类型

  • 公开/公告日2013-01-08

    原文格式PDF

  • 申请/专利权人 FRANCOIS TAILLIET;

    申请/专利号US20100907710

  • 发明设计人 FRANCOIS TAILLIET;

    申请日2010-10-19

  • 分类号G11C11/34;

  • 国家 US

  • 入库时间 2022-08-21 16:42:41

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