Digital systems are said to be constructed by means of logic gates. These gates are the AND, OR, NOT, NAND, NOR, EXOR and EXNOR gates. This Innovation is a novel three transistors (3T) based AND, OR, NAND and NOR gates with exact output logic levels, yet maintaining comparable performance than the other available logic structures. This new set of 3T logic gates are based on CMOS inverter and Pass Transistor Logic (PTL). The new logic is characterized by superior speed and low power which can be easily fabricated for Very Large Scale Integration (VLSI) designs and System on Chip (SoC) applications. The simulation tests were performed by employing standard 22nm BPTM process technology using HSPICE. According to HSPICE simulation in 22 nm CMOS process technology at room temperature, and under given conditions, the proposed 3T gates shows an improvement of 88% less power consumption on an average over conventional CMOS logic gates. The devices designed with 3T gates will make longer battery life by ensuring extremely low power consumption.
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