首页> 外国专利> DIGITAL PREDISTORTION APPARATUS AND METHOD USING THE SUM OF ABSOLUTE INPUT SIGNALS FOR A NON-IDENTICAL NUMBER OF DELAYS

DIGITAL PREDISTORTION APPARATUS AND METHOD USING THE SUM OF ABSOLUTE INPUT SIGNALS FOR A NON-IDENTICAL NUMBER OF DELAYS

机译:数字预失真设备和方法,使用绝对输入信号和用于非相同数量的延迟

摘要

The present invention relates to a digital predistortion apparatus, including: a coefficient control unit for setting coefficients in a look-up table, the coefficients minimizing a difference of an input signal to a power amplifier and an exponentiation of the sum of a first absolute output signal having a first number of delays and a second absolute output signal having a second number of delays, for an absolute signal of an output signal of a power amplifier; an adder for receiving a first absolute input signal having the first number of delays and a second absolute input signal having the second number of delays, for an absolute signal of the input signal of the power amplifier, and outputting the sum of the first absolute input signal and the second absolute input signal; and said look-up table, connected to the adder, for outputting result values according to the set coefficients in correspondence to the sum of the first absolute input signal and the second absolute input signal.
机译:数字预失真装置技术领域本发明涉及一种数字预失真装置,其包括:系数控制单元,用于在查找表中设置系数,所述系数使对功率放大器的输入信号的差最小化并且对第一绝对输出的和求幂。对于功率放大器的输出信号的绝对信号,具有第一延迟数量的信号和具有第二延迟数量的第二绝对输出信号;加法器,用于接收具有第一延迟数量的第一绝对输入信号和具有第二延迟数量的第二绝对输入信号,用于功率放大器的输入信号的绝对信号,并输出第一绝对输入的和信号和第二绝对输入信号;所述查找表,连接到加法器,用于根据设置的系数输出与第一绝对输入信号和第二绝对输入信号之和相对应的结果值。

著录项

  • 公开/公告号WO2013051861A1

    专利类型

  • 公开/公告日2013-04-11

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号WO2012KR08041

  • 发明设计人 MIN TAE YOUNG;

    申请日2012-10-04

  • 分类号H03F1/32;

  • 国家 WO

  • 入库时间 2022-08-21 16:33:50

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