Circuit Design for Implementing Low Power Consumption and Low Area of Flash AD Converter and Method thereof

摘要

The present invention relates to a flash type AD converter and a method for simplifying the structure of a converter for reducing power and reducing its size and reducing power consumption for signal conversion. According to an aspect of the present invention, an AD converter includes: a maximum bit determiner configured to determine a most significant digital bit value (MSB) according to whether an input analog signal is greater than or less than 1/2 voltage of an analog input range; A resistance ladder generating 2 ^N-1 −1 reference voltages; A half signal converter for generating an absolute value signal for the difference between the input analog signal and the half voltage; An amplifying and comparing unit configured to generate 2 ^N-1 -1 code values by comparing the output of the half signal converter with each of the reference voltages; An encoder for generating N-1 digital values corresponding to the 2 ^N-1 -1 code values; And an XNOR logic unit that generates bit values below the MSB by calculating XNOR logic with each of the MSB and N-1 digital values, where N is a natural number of 2 or more.