MEMORY CONTROLLER AND AN OPERATION METHOD OF A SYSTEM INCLUDING THE SAME, CAPABLE OF PREVENTING DATA BOTTLENECK PHENOMENON

摘要

PURPOSE: A memory controller and an operation method of a system including the same are provided to perform re-ordering of each data read according to in-order read request at master intellectual property (IP).;CONSTITUTION: An instruction signal generation module judges whether to read and access at least two memories among a plurality of memories on the basis of in-order read request. The instruction signal generation module generates a first instruction signal according to the judgment result (S10). A memory controller reads data which is requested to read from each memory which is read and accessed, in response to the in-order read request (S12). The memory controller transmits the read data and the first instruction signal to a system bus (S14).;COPYRIGHT KIPO 2013;[Reference numerals] (S10) Instruction signal generation module generates a first instruction signal according to the judgment resu (S12) Memory controller reads data which is requested to read from each memory which is read and accessed, in response to the in-order read request; (S14) Memory controller transmits the read data and the first instruction signal to a system bus