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Dual-modulus Prescaler Ciruit Operating At a Very High Frequency

机译:双模预分频器电路以很高的频率工作

摘要

Dual-modulus prescaler circuit (1) it is designed to operate at high frequency. Such a circuit comprises a dynamic two D- type flip-flop (12, 13), and two NAND logic gates (15, 16) disposed in the negative feedback between the two flip-flops. Two replicon-flop provides an output signal (OUT) when supplied with the clock divided by the input clock signal (CK). The frequency of the output signal is divided, it corresponds to the input clock frequency divided by 2 or 3 as a function of the applied division mode selection signal (divb) to the input of the NAND 1 logic gate 15. The non-inverting output of the second flip-flop is connected to the input of the first flip-flop (12). Agent includes three active branches (branch) 1 dynamic flip flop, and supplies the single inverted output signal. A third flip-flop 14, to supply the mode selection signal to the inverting output, and receives a mode selection signal (div) inverted in input, a non-inverted version of the second flip-flop output signal comprising the three active branches It is supplied by a clock.
机译:双模预分频器电路(1)设计用于高频运行。这样的电路包括动态的两个D型触发器(12、13),以及布置在两个触发器之间的负反馈中的两个NAND逻辑门(15、16)。当时钟被输入时钟信号除以输入时钟信号(CK)时,两个复制触发器提供输出信号(OUT)。输出信号的频率被分频,它对应于输入时钟频率除以2或3,这取决于向NAND 1逻辑门15的输入施加的分频模式选择信号(divb)。同相输出第二触发器的第二端连接到第一触发器(12)的输入。 Agent包括三个活动分支(分支)1个动态触发器,并提供单个反相输出信号。第三触发器14,用于将模式选择信号提供给反相输出,并接收在输入中反相的模式选择信号(div),该第二触发器输出信号的非反相形式包括三个有效分支It。由时钟提供。

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