SCHEME shift register, the display device and method of the shift register control circuit

摘要

1. The shift register circuit comprising shift registers, each of which is fed the first and second clock signals whose phases are different from each other, said registers configured to commit the shift operation in response to at least two clock signals whose phases are different from each other, to which number assigned said first and second clock signals, each of said shift registers comprising: an input gate from which an input signal is fed only in the active state, the storage unit of is charging the input signal supplied from the input gate, the output switching element comprising: (i) a control terminal connected to the storage node, via which carried on and / or off the output switching element; (Ii) the first end output that supplies a first clock signal, and (iii) a second end terminal coupled to the output terminal of each shift register, a first switching element connected between said storage node and a voltage source arranged to supply to said storage node voltage level corresponding to the inactive state; a band-control, adapted to generate and supply a control signal to a control terminal of the first switching element assuring the switching element depending on the voltage level of inactivity of the storage node and the voltage level of the active state of the second clock signal during the period of its activity, and in the shift register circuit dopolnitelnoukazannye shift registers connected in