首页> 外国专利> Method for performing incremental delta-sigma analog-to-digital conversion in digital transducer, involves performing adjustment of conversion period based on determined optimum output value

Method for performing incremental delta-sigma analog-to-digital conversion in digital transducer, involves performing adjustment of conversion period based on determined optimum output value

机译:在数字换能器中执行增量delta-sigma模数转换的方法,涉及基于确定的最佳输出值执行转换周期的调整

摘要

A quantization error signal (6) is output from integration stages (2) to an analog voltage detection and comparison unit (7) that determines optimum output value of incremental change in the delta-sigma analog-to-digital conversion using quantization error signal. The adjustment of the conversion period or adjustment of the necessary conversion loop is performed based on the optimum output value of incremental change in the delta-sigma analog-to-digital conversion. An independent claim is included for arrangement for performing incremental delta-sigma analog-to-digital conversion in digital transducer.
机译:量化误差信号(6)从积分级(2)输出到模拟电压检测和比较单元(7),该模拟电压检测和比较单元(7)使用量化误差信号确定Δ-Σ模数转换中增量变化的最佳输出值。基于Δ-Σ模数转换中增量变化的最佳输出值来执行转换周期的调整或必要转换回路的调整。包括关于在数字换能器中执行增量Δ-Σ模数转换的布置的独立权利要求。

著录项

  • 公开/公告号DE102011079211B3

    专利类型

  • 公开/公告日2012-12-20

    原文格式PDF

  • 申请/专利权人 TECHNISCHE UNIVERSITAET DRESDEN;

    申请/专利号DE20111079211

  • 发明设计人 UHLIG JOHANNES;

    申请日2011-07-14

  • 分类号H03M3/00;

  • 国家 DE

  • 入库时间 2022-08-21 16:22:21

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