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Electronic circuit, has generator generating grid voltage, and two bias voltages, where grid and one bias voltage change values simultaneously while other bias voltage is constituted such that junction of doped areas is blocked
Electronic circuit, has generator generating grid voltage, and two bias voltages, where grid and one bias voltage change values simultaneously while other bias voltage is constituted such that junction of doped areas is blocked
The circuit has a P-type doped area (50) extending under an insulating layer (44), and separated from a semiconductor substrate (42) by an N-type doped area (52). A generator generates a grid voltage (Vg) that is applied to a gate of a metal oxide semiconductor transistor (34), and a bias voltage (Vp), which is applied to the P-type area, and another bias voltage (V1) applied to the N-type area. The grid voltage and the former bias voltage vary between two values and change the values simultaneously. The latter bias voltage is constituted such that a junction of the doped areas is blocked. One of the two bias voltages presents an upper voltage in absolute value of 1.8 V.
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