The SNR improvement circuit, the synchronization information detector and the communication device, being SNR improvement manner, and the SNR improvement circuit which

摘要

A technique capable of improving a packet catch rate when applied to a communication device, for example. An SNR improvement circuit for improving an SNR of an input signal includes a delay unit for delaying the input signal to generate one or more delay signals, and an adder for adding the one or more delay signals and the input signal before being delayed. The input signal contains a periodic signal in which the same signal is repeated a predetermined number of times with a predetermined period. The delay unit generates the one or more delay signals with delay time which is times ( is a natural number, and is set at different values with respect to two or more delay signals) longer than the predetermined period.