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DC balanced code generation circuit, serial data transmission equipment, DC balanced code generation method, its program and recording medium

机译:直流平衡码产生电路,串行数据传输设备,直流平衡码产生方法,其程序和记录介质

摘要

PROBLEM TO BE SOLVED: To provide a DC balanced code generating circuit which generates a DC balanced code for enabling more perfect DC balanced transmission in a configuration simplified rather than a conventional transmission system.;SOLUTION: In a shift register 2, DC balanced data are generated by inverting, in transfer data from a data memory 1 sequentially holding the transfer data for each time slot: data for predetermined bits, e.g., for two bits from a preceding-two-bit data latch circuit 2 holding data for bits from a bit position of a previous time slot retroactive just for two bits; and the transfer data from the data memory 1. The generated DC balanced data are alternately inserted for each bit of the transfer data and a result is outputted as a code serial data output 4. A distance from a positive code output end of a circuit positioned on a front stage of the shift register 2 to a positive code output terminal, to which a pulse transformer or a capacitor is connected, is made equal to a distance from a negative code output end to a negative code output terminal.;COPYRIGHT: (C)2011,JPO&INPIT
机译:解决的问题:提供一种DC平衡码生成电路,该电路生成DC平衡码,以简化的配置而不是传统的传输系统实现更完美的DC平衡传输。解决方案:在移位寄存器2中,DC平衡数据是通过将来自依次保持每个时隙的传输数据的数据存储器1的传输数据反相而产生的:预定位的数据,例如,来自前两位数据锁存电路2的两位的数据,保持来自一位的位的数据仅追溯两位的前一个时隙的位置;以及从数据存储器1传输数据。将生成的DC平衡数据交替插入传输数据的每一位,并将结果输出为代码串行数据输出4。与电路正输出端的距离在移位寄存器2的前级上连接脉冲变压器或电容器的正代码输出端子等于从负代码输出端到负代码输出端子的距离。 C)2011,日本特许厅

著录项

  • 公开/公告号JP5388196B2

    专利类型

  • 公开/公告日2014-01-15

    原文格式PDF

  • 申请/专利权人 NECインフロンティア株式会社;

    申请/专利号JP20090174495

  • 发明设计人 小山 末完;

    申请日2009-07-27

  • 分类号H04L25/49;H04L25/02;H04B3/00;

  • 国家 JP

  • 入库时间 2022-08-21 16:13:47

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