A netlist generating apparatus including a memory configured to store logic design data and a processor configured to execute an operation. The operation including selecting paths with which names of instances after logic synthesis match names of modules before being uniquified during the logic synthesis by referring to violation data for paths of the instances and a correspondence table in which the modules are associated with paths of the instances, extracting a path with worst violation data from selected paths by comparing violation data of the selected paths, and adjusting a timing of the extracted path with the worst violation data and generating a netlist.
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