首页> 外国专利> SECURE COMPUTER SYSTEM FOR PREVENTING ACCESS REQUESTS TO PORTIONS OF SYSTEM MEMORY BY PERIPHERAL DEVICES AND/OR PROCESSOR CORES

SECURE COMPUTER SYSTEM FOR PREVENTING ACCESS REQUESTS TO PORTIONS OF SYSTEM MEMORY BY PERIPHERAL DEVICES AND/OR PROCESSOR CORES

机译:通过外围设备和/或处理器核心防止对部分系统内存的访问请求的安全计算机系统

摘要

A computer system is provided for preventing peripheral devices and/or processor cores from accessing restricted portions of system memory. For example, the computer system can include a host bridge, system memory coupled to the host bridge via a first access bus, a security processor coupled to the host bridge via a memory access bus that allows the security processor to access system memory and to access the peripheral device, and a security processor memory management unit (SPMMU) coupled between the peripheral device and the host bridge. The security processor is configured to program the SPMMU via the memory access bus to specify a first restricted range of physical addresses in the system memory that the peripheral device is not permitted to access. The SPMMU can then process access requests from the peripheral device and deny access requests that are determined to be within the first restricted range.
机译:提供了一种用于防止外围设备和/或处理器核心访问系统存储器的受限部分的计算机系统。例如,计算机系统可以包括主机桥,经由第一访问总线耦合到主机桥的系统存储器,经由存储器访问总线耦合到主机桥的安全处理器,该安全处理器允许安全处理器访问系统存储器并进行访问。外围设备,以及连接在外围设备和主机桥之间的安全处理器内存管理单元(SPMMU)。安全处理器被配置为经由存储器访问总线对SPMMU进行编程,以在系统存储器中指定不允许外围设备访问的物理地址的第一受限范围。然后,SPMMU可以处理来自外围设备的访问请求,并拒绝确定为处于第一受限范围内的访问请求。

著录项

  • 公开/公告号US2014173236A1

    专利类型

  • 公开/公告日2014-06-19

    原文格式PDF

  • 申请/专利权人 ADVANCED MICRO DEVICES INC.;

    申请/专利号US201213719671

  • 发明设计人 ANDREW G. KEGEL;

    申请日2012-12-19

  • 分类号G06F12/14;

  • 国家 US

  • 入库时间 2022-08-21 16:08:52

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