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SECURE COMPUTER SYSTEM FOR PREVENTING ACCESS REQUESTS TO PORTIONS OF SYSTEM MEMORY BY PERIPHERAL DEVICES AND/OR PROCESSOR CORES
SECURE COMPUTER SYSTEM FOR PREVENTING ACCESS REQUESTS TO PORTIONS OF SYSTEM MEMORY BY PERIPHERAL DEVICES AND/OR PROCESSOR CORES
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机译:通过外围设备和/或处理器核心防止对部分系统内存的访问请求的安全计算机系统
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摘要
A computer system is provided for preventing peripheral devices and/or processor cores from accessing restricted portions of system memory. For example, the computer system can include a host bridge, system memory coupled to the host bridge via a first access bus, a security processor coupled to the host bridge via a memory access bus that allows the security processor to access system memory and to access the peripheral device, and a security processor memory management unit (SPMMU) coupled between the peripheral device and the host bridge. The security processor is configured to program the SPMMU via the memory access bus to specify a first restricted range of physical addresses in the system memory that the peripheral device is not permitted to access. The SPMMU can then process access requests from the peripheral device and deny access requests that are determined to be within the first restricted range.
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