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SYSTEM AND METHOD FOR PROVIDING UNIVERSAL SERIAL BUS LINK POWER MANAGEMENT POLICIES IN A PROCESSOR ENVIRONMENT
SYSTEM AND METHOD FOR PROVIDING UNIVERSAL SERIAL BUS LINK POWER MANAGEMENT POLICIES IN A PROCESSOR ENVIRONMENT
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机译:在处理器环境中提供通用串行总线链路功率管理策略的系统和方法
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摘要
One particular example implementation may include an apparatus that includes logic, at least a portion of which is in hardware, the logic configured to: determine that a first device maintains a link to a platform in a selective suspend state; assign a first latency value to the first device; identify at least one user detectable artifact when a second device exits the selective suspend state; and assign, to the second device, a second latency value that is different from the first value.
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