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High performance pre-mixer buffer in wireless communications systems
High performance pre-mixer buffer in wireless communications systems
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机译:无线通信系统中的高性能预混缓冲器
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摘要
According to one embodiment, a high performance buffer for use in a communications system includes first and second differential blocks. Each of the first and second differential blocks comprise one or more driving transistors for generating a driving current for a load of the high performance buffer, and a feedback path for adjusting the operation of the one or more driving transistors. The feedback path includes a feedback transistor for receiving a common mode bias voltage, wherein the common mode bias voltage depends at least in part on a threshold voltage of the feedback transistor. The feedback path includes a programmable resistor and capacitor to reduce out of band loop gain and the noise. The high performance buffer is configured to achieve a high linearity, low output impedance, and low noise, and is suitable for use as a pre-mixer buffer in a wireless communications system.
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