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Process flow to reduce hole defects in P-active regions and to reduce across-wafer threshold voltage scatter
Process flow to reduce hole defects in P-active regions and to reduce across-wafer threshold voltage scatter
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机译:工艺流程可减少P有源区中的空穴缺陷并减少晶圆间阈值电压散布
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摘要
Disclosed herein is a method of forming a semiconductor device. In one example, the method comprises performing at least one etching process to reduce a thickness of a P-active region of a semiconducting substrate to thereby define a recessed P-active region, performing a process in a process chamber to selectively form an as-deposited layer of a semiconductor material on the recessed P-active region, wherein the step of performing the at least one etching process is performed outside of the process chamber, and performing an etching process in the process chamber to reduce a thickness of the as-deposited layer of semiconductor material.
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