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Power management of a spare DRAM on a buffered DIMM by issuing a power on/off command to the DRAM device
Power management of a spare DRAM on a buffered DIMM by issuing a power on/off command to the DRAM device
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机译:通过向DRAM设备发出电源开/关命令,对缓冲DIMM上的备用DRAM进行电源管理
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摘要
A computer memory, having one or more of a semiconductor memory device having an internal memory array comprising a plurality of semiconductor dynamic random access memory (DRAM) cells arranged in a matrix of rows and columns, and provided as a memory module rank of such memory devices arranged in an array on a DIMM of one or more of said semiconductor memory device on a substrate which can be coupled via a memory device data interface to a memory system as a memory subsystem, each of said memory device having a low power shut-down state that can be activated using a common memory data interface. Control of power to a DRAM issues over the data interface two commands to a DRAM power control command decode, a power-state program signal and a power-state reset signal as a power-state control commands to control the power state of said DRAM, and to activate for READ/WRITE a memory cell as a normal active or spare device.
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