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Capturing mutual coupling effects between an integrated circuit chip and chip package
Capturing mutual coupling effects between an integrated circuit chip and chip package
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机译:捕获集成电路芯片和芯片封装之间的互耦合效应
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摘要
Systems and methods are provided for capturing mutual coupling effects between an integrated circuit chip and chip package using electronic design automation (EDA) tools. Specifically, a method is provided that is implemented in a computer infrastructure for designing an integrated circuit chip. The method includes compiling process technology parameters that describe electrical behavior for a chip-package coupling and a package of the integrated circuit chip. The method also includes generating a parasitic technology file to include the compiled process technology parameters.
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