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Enhanced scalable CPU for coded execution of SW in high-dependable safety relevant applications
Enhanced scalable CPU for coded execution of SW in high-dependable safety relevant applications
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机译:增强的可扩展CPU,用于在高度依赖的安全相关应用中以代码方式执行软件
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摘要
Some embodiments of the invention relate to a single processor configured to comprise configurable hardware extensions, disposed within a data path configured to selectively provide either encoded data or original data, that allow for two modes of operation. In a high performance mode, the hardware extensions allow for increased processing bandwidth by using the hardware extensions for processing extended data (i.e., additional original data). In a safety integrity mode the hardware extensions allow for parallel processing of encoded data concurrent with the processor executing a SBST by processing a self-test program and self-test data. Therefore, the single channel processor provides a single core system that can selectively achieve either high safety integrity levels (e.g., SIL3) for safety relevant applications or high performance for non-safety relevant applications.
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