METHOD FOR THE PLACEMENT OF DIGITAL INTEGRATED CIRCUITS ON THE BASIS OF THE TENSION DROP PHENOMENA OBSERVED IN THE SUPPLY CONDUITS FOR IMPROVED TIMING AND OPERATION FREQUENCY

摘要

Novelty: a method for the placement of digital integrated circuits is disclosed. Technical field: the invention pertains to the Electronic Design Automation field (EDA) and functions in the environment of an electronic computer (CAS-Computer Aided Design). Purpose: the method presented herein is applicable for the automated natural design of digital circuits. Technical features: the invented method resolves the problem of inability in supplying the adequate supply tension required by each element (cell) of the integrated circuit for obtaining the desired timing level by incorporation of a circuit replacement algorithm based on the analysis of the tension drop phenomenon occurred in the supply conduits of the integrated circuit (IR-Drop Driven Replacement). On the basis of this characteristic, the critical path of the integrated circuit is rearranged so that the operation frequency is maximized and, thereby, the timing of the final integrated circuit improved in an average rate up to 5%. The present method is completely harmonized with the existing digital circuit design flows since the input and output files of the algorithm in use can be used for the upgrade of the industrial tools used to repletion in industry.