Power control of an external device during sleep mode low power without the intervention of the central processing unit

摘要

digital processor (204): A digital integrated circuit device operable to determine the control and status of an external device regardless of time when the digital device (202) is in a sleep mode for low power, comprising incorporating input awakening input wake wake the digital processor (204) a sleep mode to an operating mode when a first logic level is applied thereto and does not awaken the digital processor (204) when a second logic level it is applied thereto; a timer (224) coupled with a first node energization (216), wherein the timer (224) provides a signal energizing energizing the external device on the first node (216) over a first time period; a timer (214) samples, wherein the timer (214) samples causes an output signal of the external device received at a second node is applied to the input of waking the processor (204) for a second time period wherein during the second time period, the output signal from the external device determines whether the processor (204) wakes up the operating mode or remains in the sleep mode.