DECODER CIRCUIT FOR DOWN-SAMPLING A DIFFERENTIAL MANCHESTER ENCODED SIGNAL

摘要

Decoder circuits and methods (200) down-sample the samples that oversample an input signal (100) having a differential Manchester encoding. A first input port (304) receives first, second, and third samples. A second input port (308) receives a state indicating whether a clock transition or a data transition precedes the first, second, and third samples. A third input port (306) receives first, second, and third down-sampled bits. A detector circuit (322, 416) is configured to generate a detection signal (324, 420) indicating a presence of a short pulse within the samples when the state indicates the clock transition and the second and third down-sampled bits are equal and differ from the first down- sampled bit and the third sample. A generator circuit (330, 418) is configured to generate a fourth down-sampled bit (302, 414) that equals the third sample when the detection signal indicates the presence of the short pulse, and that equals the second sample when the detection signal does not indicate the presence.