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DECODER CIRCUIT FOR DOWN-SAMPLING A DIFFERENTIAL MANCHESTER ENCODED SIGNAL

机译:用于对差分曼彻斯特编码信号进行下采样的解码器电路

摘要

The decoder circuit and method 200 downsamples samples that oversample the input signal 100 with differential Manchester encoding. The first input port 304 receives the first, second and third samples. The second input port 308 receives a status indicating whether a clock transition or a data transition precedes the first, second, and third samples. The third input port 306 receives the first, second and third downsampled bits. The detector circuitry 322, 416 may be configured to detect a short pulse in the sample when the state indicates a clock transition and the second and third downsampled bits are equal and differ from the first downsampled bit and the third sample Gt; 324 /RTI Generator circuit (330, 418) generates a fourth downsampled bit that is identical to the third sample when the detection signal indicates the presence of a short pulse and the same as the second sample when the detection signal does not indicate the presence (302, 414).;
机译:解码器电路和方法200使用差分曼彻斯特编码对对输入信号100进行过采样的采样进行降采样。第一输入端口304接收第一,第二和第三样本。第二输入端口308接收指示在第一,第二和第三采样之前是时钟转变还是数据转变的状态。第三输入端口306接收第一,第二和第三降采样位。检测器电路322、416可以被配置为在状态指示时钟转变并且第二和第三下采样比特等于并且不同于第一下采样比特和第三采样Gt时检测样本中的短脉冲; 324发生器电路(330、418)在检测信号指示存在短脉冲时生成与第三样本相同的第四降采样位,并且在检测信号未指示第二脉冲时与第二采样相同。存在(302、414)。

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