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Verification module apparatus for debugging software and timing of an embedded processor design that exceeds the capacity of a single FPGA
Verification module apparatus for debugging software and timing of an embedded processor design that exceeds the capacity of a single FPGA
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机译:验证模块设备的调试软件和嵌入式处理器设计的时序超过单个FPGA的容量
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摘要
A plurality of Field Programmable Gate Arrays (FPGA), high performance transceivers, and memory devices provide a verification module for timing and state debugging of electronic circuit designs. Signal value compression circuits and gigabit transceivers embedded in each FPGA increase the fanout of each FPGA. Ethernet communication ports enable remote software debugging of processor instructions.
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