APPARATUS AND METHOD FOR REDUCING PEAK POWER USING ASYNCHRONOUS CIRCUIT DESIGN TECHNOLOGY

摘要

The present invention relates to an apparatus for reducing peak power using asynchronous circuit design technology comprising: a combinational circuit unit for dividing a combinational circuit into multiple partial circuits based on the depth of input and output; and an asynchronous control circuit unit for asynchronously setting switch operations of the partial circuits according to a temporal relation and controlling the combinational circuit so that the switch operations do not occur in different partial circuits in case the switch operation occurs in one partial circuit. [Reference numerals] (220) Asynchronous control circuit unit;(230,DD,EE,FF) Barrier gate circuit unit;(240,AA,BB,CC) Delay device unit;(250) Proximity circuit unit